The present invention relates to input and output interfaces for integrated circuits, and more particularly to high performance interfaces that have a high degree of flexibility and configurability.
Electronic systems are becoming more complex as they handle increasingly difficult tasks. Accordingly, the amount of data transferred between integrated circuits in these systems continues to climb. At the same time, system designers want smaller, lower pin-count packages that consume less space on the system's printed circuit boards. Thus, very high data rates are desirable at integrated circuit input and output pins.
But it is also desirable for the circuits that form the input and output structures at these pins to be highly flexible. For example, sets, presets, and enables at registered inputs and outputs can ease the implementation of complicated logic functions, and JTAG boundary test access can simplify system diagnostics.
Unfortunately, increased flexibility results in slower circuits. The same transistors that add functions and increase multiplexing insert parasitic capacitances and resistances, slowing device performance. Increasing the configurability of an input and output interface decreases the maximum rate that the interface can process data. Also, to save power, integrated circuit designers want to use lower speed circuitry inside the integrated circuit.
Thus, what is needed is a highly flexible input and output interface that can also operate at high speed. For maximum utility, the interface should also be able to communicate efficiently with lower speed circuitry inside the integrated circuit.